| Nov 2024 | The conference article "Activity Compatible Device-to-Circuit Framework for Process, BTI and HCD Variability" was selected amongst the top 8 most impactful papers, and invited for publication in IEEE Transactions on Device and Materials Reliability |
| Aug 2024 | Started Graduate School at Georgia Tech |
| Aug 2024 | My first conference paper titled "Activity Compatible Device-to-Circuit Framework for Process, BTI and HCD Variability" got accepted at IIRW 2024 |
| June 2024 | Presented my Master's project on BEOL-compatible ITO transistor fabrication and modeling for heterogeneous 3D integration. |
| February 2024 | Received GRA offer from Prof. Shimeng Yu. Will be an incoming Ph.D. student at Georgia Institute of Technology.  |
| February 2024 | Fabricated back-gated transistor: ITO BG-FET using ALD, RF sputtering and 2 optical lithography levels. The transistor leakage is very low (1e-12 A/um)  |
| December 2023 | Fabricated my first transistor: ITO Ring-FET using ALD, RF sputtering and 1st level optical lithography. The transistor has an incredible S/D Ioff of 5e-17 A/um and SS of 69.9 mV/dec |
| November 2023 | Submitted my first journal paper titled "Design Space and Variability Analysis of SOI MOSFET for Ultra-Low Power Band-to-Band Tunneling Neurons" to the IEEE Transactions on Electronic Devices. |
| August 2023 | Started my Master's project on BEOL-compatible ITO transistor fabrication and modeling for heterogeneous 3D integration with Prof. Veeresh Deshpande. |
| May 2023 | Started a research project on process and aging variability-aware degradation in CARAT with Prof. Souvik Mahapatra on the topic: Reliability of Cryo CMOS. |
| June 2023 | Received my first conference rejection (SISPAD 2023) ;p  |
| May 2023 | Received the Undergraduate Research Award 01 (URA 01) for "excellent contribution to research in preliminary research/developmental exposure" for my project: "TCAD calibration of SOI MOSFET followed by design space exploration for energy-efficient neurons." |
| April 2023 | Submitted my first conference paper titled "7.5× Energy Reduction by Engineering SOI MOSFET Design for Ultra-Low Power Neurons Using Experimentally Calibrated TCAD" to SISPAD 2023. |
| May 2022 | Joined Atomberg Technologies as a Research and Development Engineer intern. |
| May 2022 | Started research with Prof. Udayan Ganguly in the SOXI, Variability, FeRAM subgroup of the MeLoDe lab. |
| December 2021 | Returned to campus after a 2-year COVID break. |
| June 2021 | Started the Summer Undergraduate Research Program (SURP) with Prof. Souvik Mahapatra on the topic: Reliability of Cryo CMOS. |
| May 2021 | Interned as a Data Scientist at Carnot Technologies. |
| June 2020 | Selected as the convener of the Electronics and Robotics Club, IIT Bombay. |
| July 2019 | Started my undergraduate studies in Electrical Engineering at IIT Bombay. |